What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the "extra mile" to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
TITLE : Design Verification Engineer- SMTS
In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. You will be leading IP functional verification tasks. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SoC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating sophisticated testbenches using groundbreaking verification techniques.
THE PERSON :
Strong analytical and problem solving skills with pronounced attention to detail
Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality
Someone who enjoys debugging
Person who can handle stressful environments while coming up with new insights
Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation. Own or be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure, while providing technical leadership to the team.
Own verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification. Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.
PREFERRED SKILL SETS :
Advanced knowledge of ASIC Design flow and state of the art verification flow
Proficient with Verilog, System Verilog and UVM
Familiarity with industry standard high-speed protocols such as USB and PCIE is a plus
Test bench creation and Test environments
Major in EE, CS or related, Master Degree
Santa Clara, CA
Requisition Number: 162003
Country: United States State: California City: Santa Clara
Job Function: Design
Benefits offered are described .
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